Control Flow Code Generation

Branches and Labels in Codegen

If statements, loops, and short-circuit logic require the code generator to emit labels and conditional jumps. GCC's expand_expr and LLVM's CreateCondBr split control flow into basic blocks before machine lowering.

If-Else Pattern

Evaluate condition to a temp. Emit conditional jump to else label. Generate then-branch. Unconditional jump to end. Else label. Generate else-branch. End label.

c
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Short-circuit &&: jump past right operand if left is false
While loops: head label, test, body, jump to head
Phi destruction may insert moves at block ends
Fall-through layout reduces extra jumps

Connecting to real compilers

Production compilers embed this step inside a longer pipeline. GCC flows through cpp, cc1, assembly, and ld; Clang uses the driver, Sema, LLVM IR passes, and a target backend. LLVM bitcode, JVM bytecode, and WASM are other familiar IRs at the same layer. The exercise isolates one pass so you can test it alone before chaining it to the next stage.

Why for this exercise

You will implement control flow code generation for if, else, and loops. This exercise requires emitting labels, conditional branches, and merge points so execution follows the AST's control structure.

Your Task

Implement code generation for control flow statements.

Requirements

Generate code for if statements:
- Simple if
- If-else
- Nested if-else
Generate code for loops:
- While loops
- For loops (if supported)
- Nested loops
Handle break and continue:
- Track current loop's labels
- Break jumps to loop end
- Continue jumps to loop condition check
Implement short-circuit evaluation:
- &&: Skip right side if left is false
- ||: Skip right side if left is true
Generate proper comparison code:
- Map comparison operators to x86 conditional jumps
- Handle signed vs unsigned comparisons

Success Criteria

Generate correct code for nested if-else
While loops work correctly
Break and continue work in loops
Short-circuit evaluation prevents unnecessary computation

Branches and Labels in Codegen

If-Else Pattern

Evaluate condition to a temp. Emit conditional jump to else label. Generate then-branch. Unconditional jump to end. Else label. Generate else-branch. End label.

c
Loading…

Short-circuit &&: jump past right operand if left is false
While loops: head label, test, body, jump to head
Phi destruction may insert moves at block ends
Fall-through layout reduces extra jumps

Connecting to real compilers

Why for this exercise

Your Task

Implement code generation for control flow statements.

Requirements

Generate code for if statements:
- Simple if
- If-else
- Nested if-else
Generate code for loops:
- While loops
- For loops (if supported)
- Nested loops
Handle break and continue:
- Track current loop's labels
- Break jumps to loop end
- Continue jumps to loop condition check
Implement short-circuit evaluation:
- &&: Skip right side if left is false
- ||: Skip right side if left is true
Generate proper comparison code:
- Map comparison operators to x86 conditional jumps
- Handle signed vs unsigned comparisons

Success Criteria

Generate correct code for nested if-else
While loops work correctly
Break and continue work in loops
Short-circuit evaluation prevents unnecessary computation

Topic Overview

Branches and Labels in Codegen

If-Else Pattern

Connecting to real compilers

Why for this exercise

Implementation Task

Your Task

Requirements

Success Criteria

Progressive Hints

Resources

Open Source

Control Flow Code Generation

Topic Overview

Branches and Labels in Codegen

If-Else Pattern

Connecting to real compilers

Why for this exercise

Implementation Task

Your Task

Requirements

Success Criteria

Progressive Hints

Resources

Open Source