Build a Control Flow Graph (CFG) from Your IR

CFGs Model Execution Paths

A control flow graph has basic blocks as nodes and jumps as edges. LLVM's BasicBlock, GCC's edge lists, and every dataflow analysis start here. Building the CFG from IR means partitioning instructions at leaders and wiring fall-through and branch targets.

Constructing the CFG

Leaders: first instruction, targets of jumps, instructions after branches. Each leader starts a basic block. Successors: fall-through to next block, branch targets. Predecessors are the inverse edges.

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• Entry block has no predecessors
• Exit blocks end in return or unreachable
• Critical edges may need splitting for SSA
• CFG is the input to dominance and loop analysis

Connecting to real compilers

Production compilers embed this step inside a longer pipeline. GCC flows through cpp, cc1, assembly, and ld; Clang uses the driver, Sema, LLVM IR passes, and a target backend. LLVM bitcode, JVM bytecode, and WASM are other familiar IRs at the same layer. The exercise isolates one pass so you can test it alone before chaining it to the next stage.

Why for this exercise

You will build a control flow graph from your IR. This exercise requires identifying basic block boundaries, creating block nodes, and linking predecessors and successors for each branch and fall-through.