Master the fundamental concepts of memory hierarchy through this focused micro-challenge.
When a cache set is full and a new tag arrives, a replacement policy picks the victim line. LRU (Least Recently Used) evicts the line untouched longest. It approximates temporal locality well though real hardware often uses pseudo-LRU trees for speed.
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For example, accessing ways A, B, A in a 2-way set leaves B as LRU; the next conflicting miss evicts B.
For this exercise, you will add LRU tracking to your set-associative simulator. This task asks you to log victim way indices and verify LRU order on a scripted access sequence before benchmarking realistic traces.
Keep the relevant datasheet, ISA manual, or architecture textbook chapter open while you implement. When your output disagrees with the reference trace on the same program, the bug is usually a mis-decoded opcode, a stale register read, or a flag bit left unchanged after arithmetic.
For this exercise, you will use those habits while implementing the requirement in the starter code. Microarchitectural product names change across CPU generations, but the control ideas (fetch, bypass, cache lines, vector lanes) stay stable enough to debug from first principles.
Implement LRU eviction policy for set-associative cache.
Requirements:
Three hints are available for this task, revealed one at a time inside the code workspace so you can struggle productively before seeing them.
All starter code and reference implementations are available for your local setup.
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