Implement memcpy in ARM Assembly

Byte Copies With Post-Index

Android's bionic memcpy and ARM's optimized-routines repo ship multiple tuned variants; your version teaches the load/store core. AArch64 cannot add to memory directly: load into a register, store out, advance pointers.

asmCopy
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• x0 dest, x1 src, x2 count per AAPCS64
• Post-index [x1], #1 loads then bumps src
• ldrb/strb work on unaligned addresses; ldp wants 16-byte alignment for speed

For this exercise, you will copy arbitrary byte counts including zero. This task asks you to return the original dest pointer in x0, matching libc semantics, because OS kernels and network stacks call memcpy millions of times per second on arm64 servers.

Keep the relevant man page, ABI doc, or Rust reference chapter open while you work. When your output disagrees with the reference implementation on the same machine, the mismatch is usually an alignment rule, an off-by-one terminator, or a register slot you misread in GDB. Skim the official documentation for the tool or ABI named in the exercise; the prose changes, but register roles, syscall numbers, and ownership rules stay stable across releases. Treat each failure as a contract test: the CPU, kernel, and borrow checker enforce rules whether or not the tutorial mentioned them explicitly.