Build Simple Page Table: Map Virtual to Physical Addresses

Virtual to Physical

Page tables translate virtual addresses to physical frames. x86 uses multi-level tables: a miss walks levels, a hit comes from the TLB. User processes see contiguous virtual memory; physical frames may be scattered.

Simple Two-Level Model

For this teaching table:

• VPN split: top bits index L1, next bits index L2, offset picks byte
• PTE flags: present, writable, user
• TLB shootdown: required after unmapping

For example, virtual 0x0040_1000 might map to physical 0x0000_B000 with present bit set and writable clear for a read-only mapping.

Why This Matters in Production

The VPN/offset split and present-bit check you implement here are exactly what the x86 MMU performs on every single memory access, and what the CR3 register points to on every context switch. Get the present-bit logic backwards and you turn a clean, recoverable page fault into undefined behavior that silently reads whatever garbage physical memory happens to be there.

Debugging Checklist

Before you call the implementation done, walk failure modes on purpose. Test empty structures, single-element edge cases, maximum concurrency, and errno paths that must not crash the program. OS code usually fails in production when happy-path tests pass but invariants break under contention or memory pressure.

Implementation Notes

Keep structures small and name fields after kernel counterparts when possible. That lets you read man pages and kernel source side by side while you work. Print observable events during development; remove noisy logs once tests pass reliably.

For This Exercise

You will implement map_page, unmap_page, and translate on an in-memory two-level structure. Understanding PTE flags matters because your mini-kernel later installs real tables with the same bits.