Implement Efficient Dot Product Using SIMD

Dot Product with FMA

A dot product sums element-wise products: sum(a[i]*b[i]). SIMD loads chunks, multiplies, and accumulates in a vector register; horizontal reduction produces the final scalar.

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Reduction Tree

Fold acc with _mm256_hadd_ps or extract 128-bit lanes and add serially. FMA (a*b+c in one op) saves latency on Intel since Haswell.

For example, dotting length-8 float vectors needs one FMA and a short horizontal add instead of eight multiplies and seven scalar adds.

For this exercise, you will implement SIMD dot product and validate against a double-precision reference sum. This task asks you to report numeric error bounds for float accumulation order differences.

Working Through the Exercise

Keep the relevant datasheet, ISA manual, or architecture textbook chapter open while you implement. When your output disagrees with the reference trace on the same program, the bug is usually a mis-decoded opcode, a stale register read, or a flag bit left unchanged after arithmetic.

• Trace first: walk one failing input by hand before changing random lines
• Read the manual: skim the official doc for the mechanism named in this task
• Compare baselines: save measurements from the prior step so speedups are honest

For this exercise, you will use those habits while implementing the requirement in the starter code. Microarchitectural product names change across CPU generations, but the control ideas (fetch, bypass, cache lines, vector lanes) stay stable enough to debug from first principles.