Implement Target-Specific Code Optimizations

Backend Peepholes and Strength Reduction

After initial codegen, target-specific passes clean up obvious waste. LLVM's machine instruction passes replace mul by 2 with shl, fold address modes, and delete redundant moves. GCC's peephole pass runs on the rtl stream.

Common Target Optimizations

Strength reduction: x * 8 becomes x << 3. Peephole: mov rax, X; mov rbx, rax becomes one move. Branch folding: eliminate jump to adjacent label. Instruction combining: lea for add + shift.

asmCopy
Loading…

• Must preserve semantics and flags side effects
• Run on linear instruction list or basic blocks
• Profile-guided layout places hot blocks together
• Target hooks differ: ARM has different addressing modes than x86

Connecting to real compilers

Production compilers embed this step inside a longer pipeline. GCC flows through cpp, cc1, assembly, and ld; Clang uses the driver, Sema, LLVM IR passes, and a target backend. LLVM bitcode, JVM bytecode, and WASM are other familiar IRs at the same layer. The exercise isolates one pass so you can test it alone before chaining it to the next stage.

Why for this exercise

You will implement target-specific code optimizations on generated assembly. This exercise asks you to apply strength reduction and peephole rewrites that exploit x86 instruction patterns.