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Master the fundamental concepts of arm assembly (aarch64) through this focused micro-challenge.
You now ship to x86 servers and AArch64 laptops/phones. Rosetta 2 translated x86 Mac apps to arm64; AWS moved fleets to Graviton. Porting bugs often come from ABI differences, not syntax sugar.
| Topic | x86-64 Linux | AArch64 Linux |
|---|---|---|
| Args | rdi, rsi, rdx, rcx, r8, r9 | x0-x7 |
| Return | rax | x0 |
| Syscall insn | syscall | svc #0 |
| Syscall # reg | rax | x8 |
| Memory math | allowed in ALU ops | load/store only |
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x86 uses variable-length encodings; AArch64 uses fixed 32-bit words. x86 has fewer GPRs but memory operands; ARM has 31 GPRs and explicit loads.
For this exercise, you will implement the same integer sum in both ISAs and document divergences. This task asks you to pair each instruction with its ABI role, because dual-ISA fluency is now baseline for systems engineers maintaining cross-platform runtimes.
Keep the relevant man page, ABI doc, or Rust reference chapter open while you work. When your output disagrees with the reference implementation on the same machine, the mismatch is usually an alignment rule, an off-by-one terminator, or a register slot you misread in GDB.
Write the same simple function in both x86-64 and AArch64 assembly and compare.
Requirements:
Three hints are available for this task, revealed one at a time inside the code workspace so you can struggle productively before seeing them.
All starter code and reference implementations are available for your local setup.
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