x86 Assembly Generation

Lowering IR to x86

The final backend maps IR operations to machine instructions. Clang's x86 backend and GCC's rtx emission translate add to addl, spills temporaries to stack slots, and follow the System V AMD64 ABI for calling conventions.

Instruction Selection Basics

Each IR opcode maps to one or more assembly instructions. Loads from variables become mov from memory. Adds become add between registers. Compare and branch become cmp + je/jne.

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• Registers: eax, ebx, ecx, edx on x86-32; rdi, rsi, rax on x86-64 SysV
• Stack slots hold spilled temporaries
• Calling convention dictates argument registers
• Labels become assembly label directives

Connecting to real compilers

Production compilers embed this step inside a longer pipeline. GCC flows through cpp, cc1, assembly, and ld; Clang uses the driver, Sema, LLVM IR passes, and a target backend. LLVM bitcode, JVM bytecode, and WASM are other familiar IRs at the same layer. The exercise isolates one pass so you can test it alone before chaining it to the next stage.

Why for this exercise

You will generate x86 assembly from your IR. This exercise asks you to map arithmetic, moves, and branches to assembly syntax and manage register and stack operands for a simple instruction subset.