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Build 4-bit ALU Supporting Multiple Operations

hard8/8

Simulate Digital Circuits in Hardware SimulatorNext

Language

Compiler

2.0s Limit 256MB

Implementation

Build 4-bit ALU supporting ADD, SUB, AND, OR, NOT, XOR operations.

Requirements:

Implement 4-bit ALU with 6 operations
Use opcode to select operation
Implement ADD using ripple-carry adder
Implement SUB using two's complement
Implement logic operations (AND, OR, XOR, NOT)
Output 4-bit result
Set flags (Zero, Carry, Negative)
Test all operations
Show operation results

Why This Matters

This opcode-selected ALU mirrors the real arithmetic/logic unit inside every x86, ARM, and RISC-V core, where a multiplexer picks between adder, subtractor, and bitwise-logic outputs based on the decoded instruction. The Zero, Carry, and Negative flags you compute here are the same status flags, EFLAGS on x86 and CPSR/NZCV on ARM, that conditional branch instructions test in every compiled program.

Hints

0 / 3 revealed

Validation Suite

main.c

Workspace 1.0