This end-to-end simulation mirrors what Logisim, the nand2tetris hardware simulator, and professional HDL tools like Verilator and ModelSim do before any silicon is fabricated: a bug caught in simulation costs nothing, while one caught after tape-out at a foundry like TSMC costs millions of dollars in respin costs. Composing and integration-testing circuits, exactly as you do here, is the daily discipline of hardware verification engineering.