Add Branch Instructions: JMP, JEQ, JGT

Changing Control Flow

Branch instructions compare flags or registers and overwrite the program counter when a condition is true. Without branches, programs are straight-line calculators; with them, CPUs can loop, branch on error, and implement if/else.

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Pipeline Complication Preview

Branches are cheap in your sequential emulator but expensive in pipelined hardware because the fetch stage may already pull wrong-path instructions. Later tasks add predictors and flushes.

For this exercise, you will implement JMP, JEQ, and JGT using the flag bits from your ALU. You will need correct PC writes to run a counting loop that terminates when a register hits zero.

Working Through the Exercise

Keep the relevant datasheet, ISA manual, or architecture textbook chapter open while you implement. When your output disagrees with the reference trace on the same program, the bug is usually a mis-decoded opcode, a stale register read, or a flag bit left unchanged after arithmetic.

• Trace first: walk one failing input by hand before changing random lines
• Read the manual: skim the official doc for the mechanism named in this task
• Compare baselines: save measurements from the prior step so speedups are honest

For this exercise, you will use those habits while implementing the requirement in the starter code. Microarchitectural product names change across CPU generations, but the control ideas (fetch, bypass, cache lines, vector lanes) stay stable enough to debug from first principles.