Implement a Game Boy Emulator: Sharp LR35902 CPU and GPU

Game Boy LR35902

The original Game Boy CPU is a Z80-ish 8-bit core with hybrid registers and a 160x144 LCD. It shares emulation fundamentals with CHIP-8 and NES but adds GPU modes, VRAM banking, and a larger opcode matrix.

System Blocks

Major pieces:

• CPU: LR35902 @ 4.19 MHz, 8 GPRs, 16-bit SP/PC
• MMU: ROM banking, VRAM, WRAM, OAM, I/O, HRAM
• PPU: background, window, 40 sprites, mode 0-3 timing
• Timer, serial, joypad

Cartridge mappers (MBC1, MBC3) bank-switch ROM and RAM; ignoring banking loads the wrong code mid-game.

For example, opcode \`0xFE\` (CP d8) compares A with an immediate and sets Z/N/H/C flags used by every conditional branch.

Boot ROM optionally initializes hardware before jumping to cartridge \`0x0100\`.

Design Notes

The LCD status register reports mode 0-3 timing; polling it is how many games synchronize sprite updates. Ignoring mode transitions causes raster effects and status bar splits to break.

For This Exercise

This exercise asks you to implement Game Boy CPU fetch-decode-execute plus basic MMU routing. You will lay groundwork for PPU and timer tasks that complete a playable emulator skeleton.

You will use the same mental model here when reading production interpreter source later in the track. Sketch one concrete input on paper, predict the outcome, then confirm with code. That discipline catches logic errors early and makes debugging far faster when you extend the implementation in follow-on tasks.