Add NES PPU (Graphics): Nametables, Sprites, Palette, Rendering

The NES PPU

The Picture Processing Unit renders 256x240 frames from nametables, pattern tables, palettes, and sprites. CPU emulators stay blind without PPU timing; many ROM tests fail on scanline timing alone.

Background and Sprites

Key structures:

• Nametables: 2 KiB VRAM tile maps (with mirroring modes)
• Pattern tables: 8 KiB CHR-ROM/RAM tile graphics
• OAM: 64 sprite entries (y, tile, attr, x)
• Registers: \`PPUCTRL\`, \`PPUMASK\`, \`PPUSTATUS\`, \`OAMADDR\`, scroll and addr ports

Rendering walks scanlines, fetches background tiles, evaluates sprite 0 hits, and outputs pixels through a palette lookup.

For example, writing \`0x80\` to \`PPUCTRL\` enables NMI at vblank, which games use to update tiles safely.

\`\`\` vblank -> NMI -> game updates OAM/nametable -> next frame \`\`\`

Design Notes

Nametable mirroring mode depends on the cartridge mapper wiring, not just PPU registers. Vertical versus horizontal mirroring changes which physical VRAM backs each name table address.

For This Exercise

This exercise asks you to implement PPU register stubs and a framebuffer renderer. You will simulate vblank timing and draw background tiles so CPU test ROMs can progress past boot.

You will use the same mental model here when reading production interpreter source later in the track. Sketch one concrete input on paper, predict the outcome, then confirm with code. That discipline catches logic errors early and makes debugging far faster when you extend the implementation in follow-on tasks.