LC

Add ALU to CPU Emulator Supporting Arithmetic and Logic Ops

medium2/10

Implement Fetch-Decode-Execute Cycle for Toy ISA Add Register File: 8 General-Purpose Registers

Language

Compiler

2.0s Limit 256MB

Implementation

Add ALU to CPU emulator with arithmetic and logic operations.

Requirements:

Implement ALU with ADD, SUB, AND, OR, XOR, NOT
Add flags register (Z, C, N)
Integrate ALU into execute stage
Support register-register operations
Update flags after each operation
Test ALU operations
Verify flag correctness

Why This Matters

Wiring the ALU into the execute stage and updating Zero/Carry/Negative flags is exactly what happens inside real x86 EFLAGS and ARM CPSR/NZCV registers on every arithmetic instruction. Compilers depend on these flags being set correctly: GCC and LLVM emit conditional branches immediately after arithmetic ops specifically to read them, so a flag bug here would silently break every if-statement in a compiled program.

Hints

0 / 3 revealed

Validation Suite

main.c

Workspace 1.0